The present invention relates to an integrated circuit and more particularly to an integrated circuit for producing pulse signals with a desired duty.
A conventional circuit of this type includes a pulse signal generating circuit. Japanese Patent Publication Laid-Open No. 60-217722 discloses a conventional integrated circuit which has the signal generating circuit (hereinafter refered to as a first conventional integrated circuit).
Referring to FIG. 12, the first conventional integrated circuit has a delay path L0 with a delay time of t1+t2. Delay path L0 consists of a series connection of a delay path L1, with a delay time of t1, and a delay path L2, with a delay time of t2. The output of delay path L0 is logically inverted by an inverter 1202 and fed back into the input of delay path L0 through an OR circuit 1201. The output from the middle tap point of delay path L0, the output of delay path L1, is also logically inverted by an inverter 1203 and fed back into the input of delay path L0 through an OR circuit 1201. Thus, a delay loop with a delay time of t1 and a delay loop with a delay time of t1+t2 are formed.
Next, the operation of the first conventional integrated circuit will be described.
As described above, logic signals (pulse signals) circulating through the two delay loops are integrated into one logic signal by OR circuit 1201, which is then returned to the input of delay path L0. In other words, signals, which circulate two types of delay loops having different delay times, interfere with each other, and the generated pulse signal is outputted. As a result, by maneuvering the two delay times t1 and t2, the duty of the output pulse signal, the ratio of tm=t1 and tm=t1+t2, is controlled to produce a desired duty.
Another conventional integrated circuit is disclosed in Japanese Patent Application Laid-Open No. 63-237610 (hereinafter refered to as a second conventional integrated circuit).
Referring to FIG. 14, the second conventional integrated circuit comprises: an exclusive OR circuit 1401 which produces a multiplied signal by performing an exclusive OR operation on the input signal and the input signal delayed by a plurality of delay circuits 1402, each of which has a different delay time; a duty determination circuit 1403 for outputting the determination signal specifying the direction of change in delay amounts of the delay circuit 1402 for making the output of the exclusive OR circuit 1401 a fixed duty value; and a selector 1404 for inputting the determination signal from the duty determination circuit 1403 and switching the delay time of the delay circuit 1402 based on the specified direction of change in delay time.
In FIG. 15, duty determination circuit 1403 includes an integration circuit 14031 that is used for detecting the high and low level pulse widths of the output signal.
Next, the operation of the second conventional integrated circuit will be described.
Duty determination circuit 1403 detects the high and low level pulse widths of the multiplied signal outputted from the exclusive OR circuit as a voltage, and switches selector 1404 so that the high and low level pulse widths become the predetermined value. Thus, the duty of the output signal produced by multiplying the input signal can be set to a desired value.
In the first conventional integrated circuit, however, a problem occurs because the lower limit of the operating frequency is restricted. If the delay time of the delay path is increased, the waveform of the pulse signal deteriorates because the circuit is configured as a ring oscillator. The waveform deterioration produces noise which causes a malfunction.
The first conventional integrated circuit also produces another problem because after the circuit operation stabilizes and stops for a time longer than the cycle of the input signal, the input signal can not be followed immediately when the input of the input signal is started again. This is because the circuit is configured as a ring oscillator.
On the other hand, in the second conventional integrated circuit, a problem occurs because after the circuit operation stabilizes and stops for a time longer than the cycle of the input signal, the input signal can not be followed immediately when the input of the input signal is started again. This is because integration circuit 14031 is used in the duty determination means.
The second conventional integrated circuit causes other problems because the output signal is restricted to the signal obtained by multiplying the input signal and the duty of the output signal does not become 50 percent unless the duty of the input signal is 50 percent.